MoreCkt: Automating Analog Circuit Design With Preference-Driven Multi-Objective Reinforcement Learning

Overview

Analog circuit synthesis poses complex optimization problems in high-dimensional design spaces, where integrated circuit (IC) designers must employ laborious, manual parameter tuning to satisfy conflicting design criteria over the span of several weeks. Existing solutions for circuit sizing and topology optimization suffer from low generalizability and inadequate accuracy. Multi-objective reinforcement learning (MORL) optimizes each parameter concurrently, resolving these limitations by capturing and automating the trade-off navigation inherent to modern IC design workflows. Therefore, I present MoreCkt, a MORL-based framework for analog circuit design optimization that replaces scalar reward optimization with vector-valued learning and preference-aware conditioning. MOReCkt uses a preference vector to specify the relative weights of multiple objectives, enabling a single trained model to generate designs for varying design priorities using cosine similarity as the preference-guidance strategy. The framework was evaluated on 1,000 target specifications across three circuit topologies. On a two-stage operational amplifier, MoreCkt outperformed the existing AutoCkt baseline, achieving a superior mean figure of metric (FoM) score of -1.67 compared to -0.14, and consistently met/exceeded targets on gain, UGBW, and PM, and kept IBIAS near or below target. I achieved 98.2% generalization, discovering 982/1000 Pareto-optimal solutions that met/exceeded target specifications, and demonstrated a 55.6% improvement in sample efficiency with a 2.45× runtime speedup. This work shows promising potential to reduce IC design time from weeks to hours, addressing the growing shortage of experienced designers in the semiconductor industry.

Competition history

• ISEF 2026 Embedded Systems · Entry EBED044

Resources

• ISEF abstract page ↗

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