Determining Likelihood of Computer Chip Malfunction through Probabilistic Analysis of Current Density

Overview

Objectives/Goals This project attempts to probabilistically determine the likelihood of a particular malfunction in a computer chip. Basically, if too many transistors in a computer chip are active at the same time (this corresponds to a high current density) then there is a chance of overheating. Therefore, this project mathematically analyses the current density in order to consequently analyze the chances of a malfunction. Methods/Materials To model a computer chip, we utilized a boolean grid. An active transistor was represented by a "1" in a cell, while an inactive transistor was represented by a "0". By our objective, we wish to compute the probability that there is a high density of 1's in any location in our grid. Results Currently, we have 3 algorithms that determine the probabilistic distribution in the one dimensional case. 1 algorithm is exact and runs on exponential time, and the other 2 are approximations that run on polynomial time. The approximations are fairly accurate for certain conditions. More results are pending. Conclusions/Discussion We conclude that our approximations could possibly be feasible (if generalized) in the real world. However, more testing will be required to confirm this. Future research would consist of generalizing these algorithms to higher dimension cases and further testing on the algorithms.

Competition history

• CSEF 2011 Electronics & Electromagnetics · Entry S0902

Resources

• CSEF project summary ↗

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