Creating a Light Speed Linear Algebra Accelerator With Silicon Photonics
ISEF · 2023 Embedded Systems
Overview
Over the past few decades, data has grown exponentially. This has become clear in recent years, with the emergence of complex simulations, large databanks, and dense artificial intelligence algorithms. However, while great strides have been made with respect to software, hardware accelerators have remained largely unchanged. In the past, data processing has generally been realized through graphics processing units (GPU); however, these types of electrically bound systems are unable to be optimized in the long-term due to a physical size limit imposed upon transistors. Furthermore, dated hardware is unable to satisfy the rapidly growing data market. This project utilizes a silicon photonics chip with a Mach-Zehnder Interferometer (MZI) complex to perform matrix-vector multiplication using photons rather than the traditional compute medium of electrons. As matrix-vector multiplication is the mathematical foundation for most data processing, such a chip would be able to accelerate computing to many orders of magnitude faster than current alternatives. In order to achieve this accelerator, electron beam lithography was utilized in conjunction with Silicon-on-Insulator (SOI) wafers. The wafer was initially treated with hydrogen silsesquioxane (HSQ) resist and later developed using tetramethylammonium hydroxide (TMAH). An MZI pattern was printed onto the surface of the chip. Light patterns with different phases interacted and developed a final wave amplitude through interference. The chip was tested for internal noise using an optical probing system. The on-chip loss was less than 20 dB at a wavelength of 1520 nm, which was the peak performance of the chip.
Awards (2)
- National Security Agency Research Directorate : Second Place Award “Cybersecurity”
- University of Texas at Dallas: Back-up scholarship recipients
Competition history
- ISEF 2023
Resources
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