Computing at the Speed of Light: Development of a 2-bit Multi-modal Photonic Integrated Circuit (PIC) for Highly Computational Tasks

Overview

The goal of this engineering paper was to design a functional multi-modal 2-bit photonic adder. The basis of the design of the 2-bit photonic adder circuit was the use of integrated optical components to guide the light through the circuit. The footprint of the design is 2528.1µm^2. Characterization of the photonic 2-bit adder was done with a rigorous finite-difference-time-domain simulation and through a finite-element-method mode solver. The structure has “A0,” “B0,” and “A1,” “B1” as inputs and “S0,” “S1,” and “CARRY” as the outputs. It consists of 3 couplers with 2 optical waveguides forming the structure. In order to understand the evolution of the modal profiles over time, an integrated frame was simulated over the entire circuit to average the modal properties of the design, thus the functionality of the multimode interference couplers. It was determined through the finite-difference-time-domain simulation that the operating clock rate of the adder was 562.0-GHz with perfect transmittance of 0.00 dB/cm for the fundamental mode through the circuit. A mode algorithm was used to determine the mode profiles supported by the waveguide. Through this, 12 modes were identified to be resonance modes that can propagate through the circuit with acceptable transmission losses over the domain of the circuit.

Competition history

• ISEF 2021 Embedded Systems · Entry EBED022

Resources

• ISEF abstract page ↗

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