Two Transistor Ternary Random Access Memory
ISEF · 2016 Fourth Award
Overview
The limitation of the speed of a computer is the access speed of its Random Access Memory (RAM). The growing disparity between CPU speed and RAM access times in computation is known as the memory wall. The memory wall is the current frontier in computing. Two Transistor Ternary Random Access Memory (TTTRAM) was developed to overcome limitations imposed by the memory wall. TTTRAM is a new type of RAM that utilizes pseudomorphic heterojunction bipolar transistors to achieve exasperating switching speeds. TTTRAM was built on a circuit board and compared to SRAM and DRAM. TTTRAM’s waveform was compared to the waveforms of DRAM, and SRAM at appx. 160 MHz. Power consumption was determined via a microammeter at the high state and low states of each bit of RAM. The required current for charging the bit of DRAM was determined. TTTRAM is shown to consume significantly less power per bit than DRAM or SRAM. TTTRAM uses considerably less current than competing technologies. Research shows that this technology can be implanted on Silicon-Germanium or Silicon-On-Insulator allowing for TTTRAM to be cost effective. This new technology has been proven to have ultra-low power consumption, high speed and low cost. Additional testing on a Silicon-Germanium wafer would further prove the hypothesis.
Awards (1)
- Fourth Award of $500 $500
Competition history
- ISEF 2016
Resources
Related projects
ISEF · 2014
Two Transistor Ternary Random Access Memory
ISEF · 2022
Utilizing InSb/Si Quantum Dots for the Development of Next-Generation Multivalued High-Mobility Transistor Technology
ISEF · 2024
Designing a Novel Vertically-Stacked Nanowire-Based Complementary Field-Effect Transistor for Low-Power Applications
ISEF · 2017
Improving Resistive RAMs' Performance by Using Single Crystal MAPbBr3 Perovskite
Closest projects by meaning, across every fair and year in the corpus.
Source: Regeneron International Science and Engineering Fair